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IISc researchers develop design framework to build next-gen analog computing chipsets

Category : Science and Tech
Published on: July 08 2022 Share on facebook

  • Indian Institute of Science (IISc) researchers have developed a design framework to build next-generation analog computing chipsets.
  • Using this design framework, they have built a prototype of an analog chipset called ARYABHAT-1 (Analog Reconfigurable technologY And Bias-scalable Hardware for AI Tasks).
  • These chipsets may operate faster. It will use less power as compared to digital processors used in different electronic gadgets.
  • It has been designed by Pratik Kumar, who is a Ph.D. student at IISc.
  • ARYABHAT-1stands for “Analog Reconfigurable Technology and Bias-scalable Hardware for AI Tasks”.
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